MEMORY timing???
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  1. #1
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    Question MEMORY timing???



    Hai pren, mo nanya neh
    sebenernya timing memori tu apaan seh??

    dah lama denger seh tapi tetep nggak paham apa maksudnya
    misal timing 2-2-3-4 ato 2-2-3-5-1
    maksud dari masing2 angka itu apa yaa??

    koq ada yang 4 angka da yang 5 angka, jd bingung neehh
    da yang tau?? kalo bisa dijelasin detail,
    soalnya ane bukan cah ilkomp sich

    makasih jaabannya

    wasallam

  2. #2
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    Re: MEMORY timing???



    Coba baca disini pak, panjang soalnya klo dijelasin heheh:

    http://www.cooltechzone.com/index.ph...d=377&Itemid=0
    http://www.pcguide.com/ref/ram/timingBurst-c.html
    http://www.pcguide.com/ref/ram/timingSettings-c.html
    http://www.dewassoc.com/performance/...ory_speeds.htm

    "tRP - The speed or length of time that it takes DRAM to terminate one Row Access and start another. Switching between memory banks.


    tRCD - The time required between /RAS (Row Address Select) and /CAS (Column Address Select) access. Although this is an extreme oversimplification, think of tRCD this way. Picture an Excel chart with number across the top and along the left side. The numbers down the left side represent the Rows and the numbers across the top represents the Columns. The time it would take you to move down to Row 20 and across to Column 20 is RAS to CAS.


    tAC - The amount of time necessary to "prepare" for the next output in burst mode.


    tCAC - The Column Access Time.


    tCL - (or CL) CAS Latency Latency is the number that refers to the ratio between the column access time and the clock cycle time rounded to the next higher whole number. It is derived from dividing the column access time by the clock frequency, and raising the result to the next whole number. tCL = tCAC / tCLK. If you look above at the illustration for SDRAM burst read timing, CAS latency means the length of access time tAC is measured from the 2nd clock edge after the "Read" command.


    tCLK - The Length of a Clock Cycle.


    Read Cycle Time - The time required to make data ready by the next clock cycle in burst mode."


    " The timing of burst mode access is generally stated using this type of shorthand: "x-y-y-y". The first number ("x") represents the number of clock cycles to do the first 64-bit read/write. The other numbers are how many clock cycles to do the second, third and fourth reads/writes. An example would be "5-2-2-2", which means 11 clock cycles to do the whole burst. (Without burst mode this access would take at least 20 clock cycles: "5-5-5-5"). It is important to compare memory system timing looking at the amount of time for the full 4-access burst."
    Last edited by Fritz Edison; 24-06-2005 at 10:57.
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    Re: MEMORY timing???



    kalau yg bahasa indonesianya ada ga bro....?

    Jadi kalo timing memori tuh makin kecil voltagenya makin bagus ya?
    atau sebaliknya

    CMIIW
    ....


 

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